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Chipping 3D

BW Online Bureau Nov 08, 2014

<?xml version="1.0" encoding="UTF-8"?><root available-locales="en_US," default-locale="en_US"><static-content language-id="en_US"><![CDATA[When the gadget world moves towards 3D, why should the transistors on which they are built be left behind? One good reason is that it is difficult to build 3D transistors. Also, it is risky. But Intel has chosen to ignore these arguments and build the world's first 3D transistors. They will appear towards the end of this year in Intel chips for the first time. Intel is a loner in this move towards 3D chips. The company wants to continue Moore's Law that predicts that the performance of integrated circuits will double every two years. Intel cannot increase the clock speed of its processors continually because the energy consumption becomes too high. It is rapidly reaching the limits of its current technology, and so, among other things, it decided to expand the transistor in another dimension. There is one major reason for this decision. It is getting increasingly difficult to shrink things any more without paying a heavy price. To get more space, Intel engineers built what is generally known as fin-field-effect transistor. It is named such — for the first time by some University of California professors — because the gate of the transistor consists of a vertical fin around which wraps the conducting channel for electrons. Intel does not call it fin-field transistor, though, calling it tri-gate transistor instead. It is named so because it has three gates: one on each side of the fin and one on top. Intel says that the thin three-dimensional fin with three gates lets it control the current far better than in a flat-surface channel. In practice, what this means is that more current can flow when it is in the ‘on' state and close to zero current when it is in the off state. This extra current translates to higher performance and the near-absence of current in the ‘off-state' translates to lower power requirements. It can also switch between the two states quickly, which also increases the performance. According to Intel, the performance can increase by 37 per cent at low voltage and the energy consumption can decrease by 50 per cent. Intel likens the move towards 3D transistor like building skyscrapers when we run out of space on the ground. The fins are very thin and go upward, and so they can be packed close together. However, in spite of Intel's confidence with its research and development, other semiconductor firms think 3D transistor technology still has some way to go. To improve performance, they are instead pursuing a method first implemented by IBM in 1998, called Silicon On Insulator (SOI) technology. In essence, it involves the use of an insulator below the silicon junction. This method is compatible with current manufacturing techniques and is thus less risky, but Intel has chosen the riskier and more powerful option. Along with 3D, Intel has also announced a shift to 22-nanometer technology. These two combined should give a considerable boost to the performance of its chips. It remains to be seen how the chips will perform in practice. Intel has had a few hiccups of late, the latest one a flaw in the Sandy Bridge processor design discovered early this year. However, the tri-gate transistor gives Intel an option in the mobile world, where it can provide high performance chips without too much increase in energy consumption. It can also increase its dominance in the PC world with a substantial boost in chip power. And it can do this while continuing the parallel development of multicore chips. Intel is yet to explain plenty of things. So it remains to be seen how good they will be in mobile phones when compared to ARM chips. It remains to be seen what the consumer will buy. (This story was published in Businessworld Issue Dated 16-05-2011)